发明名称 LOGIC CIRCUIT
摘要 PURPOSE:To change a delay quantity of a delay circuit into a delay quantity on request of the delay circuit by changing an electric signal level without external adjustment or the circuit change when the delay quantity of the delay circuit is changed. CONSTITUTION:Plural paths 2 used to interconnect delay circuits are formed in parallel between an input selection section 6 and an output selection section 7, and a path is selected by an electric signal inputted to an input terminal 5 of a control section 8. Then the delay from an input terminal 3 to an output terminal 4 depends on number of the delay circuits 1 included in the selected path. Thus, when the delay of the delay circuit after the circuit design is revised, the delay on request is realized by changing the electric level of the input signal of the control section of this delay circuit without addition of an external element or re-design.
申请公布号 JPH05129911(A) 申请公布日期 1993.05.25
申请号 JP19910285799 申请日期 1991.10.31
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 TANAKA YOICHIRO
分类号 H03K5/133;H03K5/14 主分类号 H03K5/133
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