| 摘要 |
<p>An apparatus for generating test signals, preferably for use in an integrated circuit tester, comprises a sequencer (23), a Vector Memory (24) and a Waveform Memory (27). The Vector Memory (24) is addressed by the sequencer (23) and contains coded waveform information, which is, in turn, decoded into control information by the Waveform Memory (27). For this purpose, the data outputs (26) of the Vector Memory (24) control the address inputs of the Waveform Memory (27). The data outputs (32-35) of the Waveform Memory (27) control circuitry like a formatter (28) or a comparator (30) which link the waveform information with timing information from one or more edge generators (36). The formatters (28), comparators (30) etc. are, in turn, in connection with a device under test. The present apparatus provides full flexibility in the generation of formats and waveforms and, in particular, timing and format changes "on the fly", i.e. without additional delay. Flexibility may be increased if the Waveform Memory (27) is reprogammable. <IMAGE></p> |
