发明名称 |
INSULATED GATE GTO THYRISTOR |
摘要 |
According to this invention, there is disclosed an insulated gate GTO thyristor comprising a pnpn structure including a p-type emitter layer, an n-type base layer, a p-type base layer, and an n-type emitter layer. The thyristor has a first gate electrode contacting the p-type base layer and a second gate electrode formed on a channel region of the p-type base layer through a gate insulating film. An n+-type layer of the n-type emitter layer immediately below a cathode electrode and an n--type layer of the n-type emitter layer contacting the channel region are formed in different manufacturing steps, and an emitter breakdown voltage and the threshold voltage of the second gate electrode are optimally set.
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申请公布号 |
US5210432(A) |
申请公布日期 |
1993.05.11 |
申请号 |
US19900615252 |
申请日期 |
1990.11.19 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SHINOHE, TAKASHI;ATSUTA, MASAKI;NAKAGAWA, AKIO |
分类号 |
H01L29/744;H01L29/08;H01L29/74;H01L29/749 |
主分类号 |
H01L29/744 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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