| 摘要 |
<p>A direct memory access controller for allowing direct access to memory, the direct memory access controller being connected to receive control information from a processor portion, to provide data information to a system memory and an I/O bus and to receive data information from the system memory and the I/O bus. The direct memory access controller includes a register circuit which receives the data information, holds the data information and provides the data information, a backup circuit, the backup circuit which receives and stores data information from the register circuit, and a direct memory access control circuit which receives the control information from the processor circuit and provides control information to the register circuit and the backup circuit. The backup circuit stores data information from the register circuit while the register circuit receives, holds and provides alternate data information based upon control information which is received from the direct memory access control circuit. <IMAGE></p> |
