发明名称 TRENCH FILLING METHOD AND METHOD FOR FORMING CONTACT POINTS OF PLURALITY OF SUBLAYERS
摘要 PURPOSE: To fill a trench with a high aspect ratio for a sublayer contact, by converting a relatively low-temperature CVD doped amorphous silicon that is deposited by short-time high-speed thermal anneal (RTA) processes performed under a low-temperature anneal and a succeeding high-temperature to nearly single-crystal silicon. CONSTITUTION: A wafer 10 is loaded to a CVD system preferably in vacuum to deposit CVD amorphous silicon 29 due to the doping of boron, arsenic, or phosphor of an original position. The amorphous silicon 29 is deposited to deep and narrow trenches 17 and 19 at a temperature less than 570 deg.C. The conversion to an extremely large crystal low specific resistance polysilicon is achieved by a low-temperature anneal at 400 to 500 deg.C for several hours and a short-term RTA treatment for 20 seconds at a high temperature of approximately 850 deg.C, thus filling a trench with a high aspect ratio for sublayer contact by a low-temperature treatment.
申请公布号 JPH05102298(A) 申请公布日期 1993.04.23
申请号 JP19920060746 申请日期 1992.03.18
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 KURAUSU BEYAA;EDOWAADO KAAMIN FUREDERITSUKUSU;RUI RUUCHIEN SHIYUU;DEIBUITSUDO II KOTETSUKI;KURISUTOFUAA SHII PAAKUSU
分类号 H01L21/30;H01L21/20;H01L21/302;H01L21/3065;H01L21/74;H01L21/76 主分类号 H01L21/30
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