| 摘要 |
<p>The invention relates to a charge-coupled device which has two or more parallel channels provided with a demultiplexer by which a series of consecutive signals is distributed over the parallel channels. For each signal, a given number of charge packages is formed, corresponding in size to the input signal, of which only one is stored in the relevant channel while the remaining charge packages are drained off. This method of demultiplexing imposes no or at leat substantially no speed limitations on the device, which as a result is particularly suitable as a memory or delay line for very high frequency signals, for example, of 1 GHz. In a particular embodiment, the charge-coupled device is of the buried channel type with an npn (or pnp) structure in which the charge packages are drained off through the substrate. <IMAGE></p> |
