MICROPROGRAMMED TIMER PROCESSOR

摘要

G-917 C-4050 MICROPROGRAMMED TIMER PROCESSOR A microprocessor is configured as two virtual processors having separate program counters, a common memory and a common execution unit. The processors are configured in a two stage pipeline arrangement and the instructions are interleaved so that as one processor fetches instructions the other executes. One processor runs a fixed length loop of single instructions to provide service of input/output pins at regular and frequent times to afford high resolution. The other processor runs multiple instruction routines. The instructions of either processor can modify the instructions of the other and determine whether a given instruction should be executed. The microprocessor is used as a coprocessor to relieve a main microprocessor of the burdens of managing I/O pins and of running some complex algorithms.