| 摘要 |
PURPOSE:To improve the debugging efficiency of the test program abnormality system processing of a central processing unit through the use of the software simulator of the central processing unit. CONSTITUTION:This system is provided with a fault information input means 3 inputting fault information to a fault information file 1, a fault occurred condition address read means 4 reading the memory address of a fault occurred condition from the fault information file 1, a memory address judgement means 5 judging whether an address is the same as an address which is read from the read means or not, a fault content read means 7 reading an interruption type being the fault content of the judged memory address, a fault simulation means 8 which simulates an interruption operation in accordance with the having read interruption type, a fault content output means 9 outputting a processed content and a memory access means 6 for normally accessing the memory. |
