发明名称 TTL TOTEM POLE ANTI-SIMULTANEOUS CONDUCTION CIRCUIT
摘要 Attorney Docket No.: 53.1138 TTL TOTEM POLE ANTI-SIMULTANEOUS CONDUCTION CIRCUIT An anti-simultaneous conduction transistor is incorporated into the standard TTL circuit totem pole to reduce simultaneous conduction of the pullup and pulldown transistor elements of the totem pole. The collector of the active discharge anti-simultaneous conduction transistor element (Q5) is operatively coupled to a base of the pullup transistor element (Q2,Q3) through a diode (D5), the emitter is coupled to low potential, and the base is coupled to the base of the pulldown transistor element (Q4) through ballast resistance (R6,R7). The anti-simultaneous conduction transistor element (Q5) mirrors the conducting state of the pulldown transistor element (Q4) without current hogging substantially diverting or discharging base current from the base of the pullup transistor element (Q2,Q3) whenever the pulldown transistor element (Q4) is conducting. Undesirable current spikes in the sourcing current are avoided by preventing simultaneous conduction in the totem pole.
申请公布号 CA1315361(C) 申请公布日期 1993.03.30
申请号 CA19890601618 申请日期 1989.06.02
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION 发明人 ESTRADA, JULIO R.
分类号 H03K17/16;H03K17/66;H03K19/00;H03K19/018;H03K19/088 主分类号 H03K17/16
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