发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To correct a change in a threshold voltage, to maintain the performance accuracy of the title memory device and to highly integrate the title memory device so as to comply with the miniaturization of a cell by a method wherein a bias voltage is applied to a cell region. CONSTITUTION:In a semiconductor memory device 10 which is composed by arranging a plurality of memory cell transistors 1 in a cell region 2, a bias voltage which compensates a change in a threshold voltage is applied to the cell region 2 from a biasvoltage generation circuit 3. At this time, the bias voltage can be selected in a specific-type EPROM, the change in the threshold voltage is measured via the test of a product manufactured on a trial basis, and an optimum threshold voltage is selected. Thereby, the memory device can be manufactured on a trial basis irrespective of the generation of a short- channel effect due to its miniaturization, the characteristic of the memory cell transistors can be maintained and controlled, and it is possible to comply with an irregular short-channel effect.</p>
申请公布号 JPH0574183(A) 申请公布日期 1993.03.26
申请号 JP19910233284 申请日期 1991.09.12
申请人 FUJITSU LTD 发明人 SENDA TETSUYA
分类号 G11C17/00;G11C16/06 主分类号 G11C17/00
代理机构 代理人
主权项
地址