Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers
摘要
A fast interrupt mechanism is capable of simultaneously interrupting a community of associated processors in a multiprocessor system. The fast interrupt mechanism enables the more effective debugging of software executing on a multiprocessor system by allowing all of the processors in a community associated with a parallel process to be halted within a limited number of clock cycles following a hardware exception or processor breakpoint. The fast interrupt mechanism consists of a set of registers that are used to identify associations among multiple processors, a comparison matrix that is used to select processors to be interrupted, a network of interconnections that transmit interrupt events to and from the processors, and elements in the processors that create and respond to fast interrupt events.
申请公布号
US5193187(A)
申请公布日期
1993.03.09
申请号
US19920898387
申请日期
1992.06.10
申请人
SUPERCOMPUTER SYSTEMS LIMITED PARTNERSHIP
发明人
STROUT, II, ROBERT E.;SPIX, GEORGE A.;MILLER, EDWARD C.;SCHOOLER, ANTHONY R.;SILBEY, ALEXANDER A.;PHELPS, ANDREW E.;VANDERWARN, BRIAN D.;GAERTNER, GREGORY G.