发明名称 Device for reducing the distortion introduced by a sample-and-hold circuit, and analog/digital converter using such a device
摘要 This device essentially comprises means (102, 300) for feeding back the output of this sample-and-hold circuit, onto the input of this sample-and-hold circuit. <IMAGE>
申请公布号 FR2680926(A1) 申请公布日期 1993.03.05
申请号 FR19910010943 申请日期 1991.09.04
申请人 ALCATEL CIT 发明人 BOUZIDI JEAN-PIERRE
分类号 G11C27/02 主分类号 G11C27/02
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