| 摘要 |
PURPOSE:To select the clock signal of other phase when the changing point of a data signal is close to the rise of the clock signal by preparing two kinds of phases of the clock signal. CONSTITUTION:A clock signal is delayed by a delay element 3 in the automatic clock signal phase switching circuit having a data signal input terminal 1 and a clock signal input terminal 2. An AND circuit 4 detects the rise of the clock. When the rising pulse is detected as the changing point of a random data signal at a flip-flop 5, the set terminal of a flip-flop 10 goes to an 'H' level, a selector 12 is used to invert the phase of the clock signal, thereby identifying a random data signal. |
