| 摘要 |
PURPOSE:To operate a semiconductor storage at a high speed, by providing a memory cell reduced in its size, wherein the transfer gate of a MOS-type SRAM cell is formed on a polysilicon layer, and by forming a word line and the gates of the transistors other than the memory cell on an identical layer, and by making the layer thereof into a low resistance wiring. CONSTITUTION:The source and drain of a transfer transistor T4 are formed on the polysilicon extending from a gate 3 of a driver transistor T1, and on this poly silicon a word line 7 having a polycide structure is formed. A gate electrode 14 of a transistor other than a memory cell is formed on the same layer as the word line 7, and the gate electrode 14 of the transistor of a peripheral circuit is made to have the polycide structure too, and therefore, its resistance is made low. |
