发明名称 PHASE CONTROL CIRCUIT AMONG PLURAL DIGITAL FREQUENCY GENERATORS
摘要 PURPOSE:To always hold the phase relation of output frequency among respective devices at fixed relation by adding a phase resetting order circuit to each device and transferring phase reset pulses among respective devices. CONSTITUTION:A latch circuit 3 latches a phase reset pulse by a clock and supplies the latched signal to an adding data storage 2. Respective reset pulse controller 4 ate connected to the input sides of respective circuits 3 in slave devices (2), (3) and each controller 4 has two input terminals (a), (b) and an OR output for both inputs. Each controller 4 inputs a phase reset pulse and a reset pulse from the preceding device and forms a latch pulse for its corresponding circuit 3 to extend the data of the circuit 3 up to the preceding reset pulse. Consequently the phase relation of output frequency among respective devices at an optional time after resetting phases can be held at the fixed relation in each phase reset.
申请公布号 JPH0555833(A) 申请公布日期 1993.03.05
申请号 JP19910215636 申请日期 1991.08.28
申请人 JEOL LTD 发明人 ANAI TAKAHIRO
分类号 H03B28/00;H03L7/00 主分类号 H03B28/00
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