发明名称 DEVICE FOR TESTING ELECTRONIC PARTS OR THE LIKE
摘要 PURPOSE:To improve the reliability of DUT tests by making complicated control for signal generation and measurements compatible with their time management so that the DUT tests can be performed under a condition which is very close to an actual operating condition. CONSTITUTION:Slave subsystems 11, 12,... are operated under the control and management of a master subsystem 10. A control signal synchronizing means 3 synchronizes a control signal from the system 10 with master clocks MCLK 1 or 2 and outputs the synchronized control signal to each slave subsystem through a clock distributing means 4. When the control signal is outputted to each subsystem, a clock distributing means 5 is controlled so that the master clock of the same timing as that of the synchronized control signal can be inputted to each slave subsystem. Then each slave subsystem generates the operating timing of each slave subsystem by dividing the inputted master clock by a prescribed integer.
申请公布号 JPH0552907(A) 申请公布日期 1993.03.02
申请号 JP19910242614 申请日期 1991.08.28
申请人 YOKOGAWA HEWLETT PACKARD LTD 发明人 KURITA ATSUSHI
分类号 G01R31/28;G01R31/319;G06F1/04;G06F11/22 主分类号 G01R31/28
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