| 摘要 |
PURPOSE:To enhance the patterning accuracy of wiring layer by using a photolithographic method and to enhance the reliability of wiring by a method wherein a silicon plug layer is buried inside a contact hole and the wiring layer in the upper part is formed on a flattened layer. CONSTITUTION:A direct contact part 10 is provided with an n-type polycrystalline silicon plug layer 15, a titanium silicide layer 11 and a P-type polycrystalline silicon interconnection layer 8a. A plug layer 15 which has been connected directly to an n<+> source-drain layer 7 and a gate electrode 6 and which is composed of polycrystalline silicon is buried at the inside of an opening part 16. A titanium silicide layer (an intermediate conductive layer) 11 is formed on the surface of the polycrystalline silicon plug layer 15. A direct contact structure by means of the wiring layer 8a, the source-drain region 7 and the gate electrode 6 enhances the flatness of the wiring layer 8a by burying the polycrystalline silicon plug layer 15 at the inside of the opening part 16. It is possible to prevent the titanium silicide layer 11 from forming a p-n junction. |
