| 摘要 |
PURPOSE:To detect an address practically generating a memory error by previously storing addresses to be accessed in an address storage register, and after generating an error, allowing a CPU to read out the contents of the address storage register without changing them. CONSTITUTION:When no memory error is generated, an address Ai to be used for a memory access from the CPU 5 is selected by a non-maskable interrupt(NMI) signal and stored in the address storage register 2. When an NMI signal indicating the generation of a memory error is inputted, a multiplexer 1 selects an output address Ao from the register 2, and even when the CPU 5 executes memory access, the contents of the register 2 are not changed. Since the CPU 5 executes an interruption processing routine and a buffer 3 outputs the content of the register 2 to a system data bus 14 as an error address Ae with the current routine, the CPU 5 can detect the address Ae. |
