发明名称 DATA COLLECTION SYSTEM
摘要 <p>PURPOSE:To collect data even under initial program loading, by constituting a series of programs with a plurality of blocks and collecting the data of each terminal device at the period when each block is not transmitted to the processor. CONSTITUTION:Polling instruction is set to an interface register IR according to the program stored in the memory MEM through a processor MPU and the control section AN1 detects the instruction. The polling unit PU is operated with this instruction, the polling address and command are set to a transmission register TR and the polling signal is transmitted to the line. If no response is present from the specified line for a time, it is detected at the control section A2. Further, the unit PU is driven to advance the polling counter PU, and the polling signal is transmitted to the next terminal, the data indicating the initial program loading IPL request is stored in a reception register RR, the discrimination device AN2 interprets it, the requested data is informed to a processor MPU and data collection is enabled in IPL.</p>
申请公布号 JPS5667440(A) 申请公布日期 1981.06.06
申请号 JP19790144044 申请日期 1979.11.07
申请人 FUJITSU LTD 发明人 KOYANAGI TOMOO;SAITOU KIYOSHI;UCHIUMI KIYOSHI
分类号 G06F13/00;G06F9/445 主分类号 G06F13/00
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