发明名称 |
Semiconductor memory including address multiplexing circuitry for changing the order of supplying row and column addresses between read and write cycles |
摘要 |
A memory system includes a semiconductor memory device having random-access memory cells arranged as an integrated memory cell array, a plurality of bit lines for exchanging data with each of the memory cells, and a plurality of word lines intersecting with the bit lines. The semiconductor memory device is an address multiplexed type device in which a column address for selecting a bit line and a row address for selecting a word line are obtained from a single circuit. In this device, the input order of the column and row addresses during a read cycle differs from that during a write cycle.
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申请公布号 |
US5173878(A) |
申请公布日期 |
1992.12.22 |
申请号 |
US19910671137 |
申请日期 |
1991.03.18 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SAKUI, KOJI;OHUCHI, KAZUNORI;MASUOKA, FUJIO |
分类号 |
G11C8/18 |
主分类号 |
G11C8/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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