| 摘要 |
PURPOSE:To reduce sharply the contact resistance of a wiring against the upper layer wiring in a semiconductor device by a method wherein against the wiring of Ta or Ta silicide oxidizable easily, a metal or the metal silicide having a different melting point is arranged to form the two layer structure. CONSTITUTION:A polycrystalline Si gate electrode 204 is formed against a gate oxide film 203 and an N<+> layer 202 on a P type substrate 201, and the Ta wiring 205, an Mo silicide 206 are laminated consecutively. Then it is covered with a CVD SiO2 film 207, and after it is heat treated in N2 gas, the wiring 208 is formed with AlSi. When the Ta 205 and the Mo silicide 206 are evaporated consecutively in this way, the generation of a Ta oxide on the Ta can be prevented considerably, and because the stable Mo silicide 206 exists on the Ta, so that the contact resistance with the AlSi 208 is reduced. |
