| 摘要 |
PURPOSE:To eliminate delay for a read cycle caused by reading data when partial reloading (partial write) is generated. CONSTITUTION:A central processing unit 1 outputs respective read and write command signals. An ECC(error checking correction) circuit 3 prepares the error correction code of new data to be reloaded in a main storage device (memory) 2 and based on the error correction code, the new data are written in the main storage device 2. In the case of the partial write, the memory not to be reloaded is read with the read, and the data are written in the memory to be reloaded simultaneously. The ECC circuit 3 reads data to be reloaded from a control bus 4 and reads data not to be reloaded from the memory. The correction code is written by the ECC circuit 3. Thus, the correction code is written after a write cycle. |
