发明名称 |
DIGITALE VIDEO-VERARBEITUNGSSCHALTUNG FUER FERNSEHSIGNALE. |
摘要 |
<p>A video features processor for use with a display device includes a first clock (FCS) that is line locked to the display (HSSD) and a skew-shifted second clock (SCS) that is phase locked to the horizontal sync component (HSSs) of an auxiliary video signal (Ys, Us, Vs). An A/D converter (122), responsive to the skew-shifted clock, develops digital samples representative of the auxiliary video signal. A clock transfer circuit (124), responsive to the line-locked and skew-shifted clocks, translates digital samples occurring synchronously with the skew-shifted clock signal to digital samples occurring synchronously with the line-locked clock signal. The digital samples occurring synchronously with the line-locked clock signal are stored in a memory (150).</p> |
申请公布号 |
DE3875555(D1) |
申请公布日期 |
1992.12.03 |
申请号 |
DE19883875555 |
申请日期 |
1988.08.18 |
申请人 |
RCA THOMSON LICENSING CORP., PRINCETON, N.J., US |
发明人 |
MCNEELY, DAVID LOWELL;WILLIS, DONALD HENRY, INDIANAPOLIS INDIANA, US |
分类号 |
H04N5/265;H04N5/45;(IPC1-7):H04N5/272 |
主分类号 |
H04N5/265 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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