Bias current generator circuit for a sense amplifier

摘要

A bias voltage generator (12) provides a bias control voltage that is connected to a gate of transistor (32) to sink a predetermined amount of bias current. The bias voltage generator (12) is also connected to a gate of a transistor (31) to limit the voltage to a selected bit-line within an array of flash EEPROM cells (26). The predetermined bias current is summed with the current from a selected flash EEPROM cell (46). A reference current generator portion (22), establishes both a reference current and a reference voltage at a second input to a differential amplifier (35). A current-voltage (I-V) characteristic curve of the reference voltage at the second input of the differential amplifier is approximately symmetrically located between the I-V characteristic curves of a flash EEPROM cell when the logic state of the flash EEPROM cell is in an erased state and a programmed state.