发明名称
摘要 PURPOSE:To obtain a memory which has a necessary irreducible speed, by storing the frequency of the generation of a refresh request while CRY display operation is in process without performing refreshing operation, and then performing the refreshing operation in a blanking period as many times as it is not performed. CONSTITUTION:An oscillator 1 generates the memory refreshing request at specific intervals of time. The output of the oscillator 1 in a BUSY state wherein a CRT display device 8 accesses a memory 7 is cut off by an AND gate 2 to make the refreshing request ineffective, but a counter circuit 3 counts the signal; and the refreshing operation is performed through an AND gate 5 and an OR gate 6 after the access as many times as the counted frequency to reset the counter circuit 3. Consequently, the memory which has the necessary irreducible speed is obtained to improve the reliability.
申请公布号 JPH0474797(B2) 申请公布日期 1992.11.27
申请号 JP19820065091 申请日期 1982.04.19
申请人 发明人
分类号 G11C11/401;G11C11/406 主分类号 G11C11/401
代理机构 代理人
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