| 摘要 |
A nine bit Gray code counter is constructed as a single integrated circuit such as a PLA and comprises D flip-flops, AND gates and Exclusive-OR gates. The array is programmed to provide a nine bit Gray code count at its outputs. The Q output of each flip-flop provides one bit in the Gray code count. The D input to each flip-flop is determined by the significance of the bit and the following equations: D0=A XOR Q0; D1=( &upbar& AxQ0) XOR Q1; Dn=( &upbar& Ax . . . xQn-2xQn-1) XOR Qn; and Dmsb=( &upbar& Ax &upbar& Qx &upbar& Qx . . . xQmsb-2 XOR Qmsb.
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