| 摘要 |
PURPOSE:To send a stable output signal without unsharpening a leading of a waveform by providing a noise elimination quantity setting circuit to the device. CONSTITUTION:A flip-flop(FF) 1 latches an input signal 10 at an edge timing of a clock (CLK) signal being an output of an oscillation circuit 8, and outputs the latched logic level. FFs 2-4 latch an output logic level of a pre-stage FF respectively at an edge timing of the CLK signal and output its logic level. An adder circuit 5 receives output logic levels of the FFs 1-4, counts an H level number in the output logic levels and outputs the result to an arithmetic circuit 7 in a binary number. Noise elimination quantity is preset by a noise elimination quantity setting circuit 9, a storage circuit latches the noise elimination quantity and outputs the latched quantity to the arithmetic circuit 7 in a binary number. The arithmetic circuit 7 adds an output of the adder circuit 5 and an output of the storage circuit 6 at the trailing of the CLK signal and outputs an H level of a most significant bit. |
