摘要 |
Circuit of a sample-type phase comparator operating on a subharmonic frequency, comprising an input frequency divider and a synchronized frequency divider, and a D-flip-flop, characterized in that to the data input (D) of the D-flip-flop (KF) the input frequency divider (D2) is connected, and to the clock input (C) of the D-flip-flop (KF) the synchronized frequency divider (D1) is connected, whereas the non-inverting output (Q) of the D-flip-flop (KF) is connected to the input of the low-pass filter (FDP).<IMAGE>
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