发明名称 Semiconductor integrated circuit device and method of testing the same
摘要 An EPROM and a method of testing the former, in which a defective memory cell caused by defects in the insulating films between a substrate and a floating gate and between the floating gate and a control gate can be tested without writing any data in the individual memory cells by holding data lines to a low potential and word lines fed with a voltage.
申请公布号 US5155701(A) 申请公布日期 1992.10.13
申请号 US19900535298 申请日期 1990.06.08
申请人 HITACHI, LTD. 发明人 KOMORI, KAZUHIRO;HARA, YUJI;TAKAHASHI, HIDEAKI;FUKUDA, MINORU;MEGURO, SATOSHI
分类号 G11C29/50 主分类号 G11C29/50
代理机构 代理人
主权项
地址