发明名称 DEFLECTION CORRECTION WAVEFORM GENERATING CIRCUIT
摘要 PURPOSE:To realize a high order deflection correction waveform in multi- standard with a small scale circuit. CONSTITUTION:An output of a ROM 3 is fed to a multiplier 7 and a register 8 via a bus line 6, an output of a RAM 4 is fed to a multiplier 7, an output of the multiplier 7 and the register 8 is selected by a selector 9 and fed to an adder 10. Then the output of the adder 10 is fed to accumulators 11, 12 and the output of the accumulator 12 is fed to the adder 10 and an output of the accumulator 11 is fed to the RAM 4, the multiplier 7 and the register 8 via a bus line 6. Moreover, the operation of the ROM 3, RAM 4, multiplier 7, registers 8, 9, adder 10 and accumulators 11, 12 is controlled by a signal from an instruction ROM 2.
申请公布号 JPH04282970(A) 申请公布日期 1992.10.08
申请号 JP19910046856 申请日期 1991.03.12
申请人 SONY CORP 发明人 MIYAZAKI SHINICHIRO;MURAKAMI KYOICHI
分类号 G09G1/04;G09G1/00;G09G1/16;H04N3/16;H04N3/233;H04N3/27 主分类号 G09G1/04
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