发明名称 METHOD AND SYSTEM FOR GENERATION AND SIMULATION OF LOOK-AHEAD PATTERN
摘要 PURPOSE: To enable the skipping of an ineffective test pattern in times of the minimum hard ware impact and minimum skipping overhead. CONSTITUTION: A test pattern generated in an algorithm way is constituted for an efficient test of a scan pass logic unit. A system for the generation of previous reading pattern and simulation establishes a prespecified rate of fault detection. A fault simulation engine takes one of two paths in the end of respective tester loop(TL) simulation. That is, (1) a condition just prior to the present simulated testor loop is restored to advance a pattern generator 22 by one condition when an ineffective tester loop is detected or (2) when an effective tester loop is confronted (since the end of the testor loop) the pattern generator is advanced by one condition.
申请公布号 JPH04278475(A) 申请公布日期 1992.10.05
申请号 JP19910308351 申请日期 1991.10.29
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 POORU NEEBIN KERAA;TEIMOSHII JIYON KOPUROSUKI
分类号 G01R31/28;F02B75/02;G01R31/3181;G01R31/3183;G01R31/319;G06F11/22;G06F17/50 主分类号 G01R31/28
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