摘要 |
<p>In an interrupt controller, interrupt processing mode indication circuits are provided each for each interrupt request circuit for storing interrupt processing mode information, and priority level indication circuits are provided each for each interrupt request circuit, for storing acknowledgement order information. A search information generating circuits is provided each for generating interrupt processing mode search information and priority order search information. A search information comparison circuit detects the state of the interrupt request circuit provided for each interrupt request memory circuit, and compares the processing mode information and the acknowledgement order information with the interrupt processing mode search information and priority order search information. When the processing mode of the search information generating circuit coincides with one of the processing mode indication circuits, an internal interrupt receipt signal is generated by the search information comparison circuit in response to the interrupt request signals generated by the search information comparison circuits. When the processing mode of the search information generating circuit does not coincide with anyone of the processing mode indication circuits, the processing mode search information is updated and and an internal interrupt receipt signal is generated in response to the interrupt request signal generated by the search information comparison circuit when the priority order search information of the search information generating circuit perfectly coincides with the acknowledgement order information of one of the priority order indication circuit. <IMAGE></p> |