| 摘要 |
<p>PURPOSE:To keep the number of the passage stages of clock drivers up to load circuits from clock terminals constant even when the number of the load circuirs is increased by connecting a plurality of the clock drivers, to which each input is connected, and these outputs in common with a plurality of the clock input terminals. CONSTITUTION:An LSI chip 11 has a plurality of clock input terminals 12 bonded with each input to a plurality of clock drivers 13, and all outputs from the clock drivers 13 are connected in common by an internal clock wiring 14. A plurality of load circuits 15 are bonded with the internal clock wiring 14. All of each clock driver 13 connected to each clock terminal have the same circuit constitution. When the same clock signal is input to all the clock input terminals 12 from the outside of an LSI at that time, it is input simultaneously to the clock drivers 13, and output to the internal clock wiring 14, and an output signal from the clock wiring 14 is input simultaneously to all the load circuits 15.</p> |
