发明名称 |
Method for manufacturing a Bi-CMOS semiconductor device |
摘要 |
There is provided a method of manufacturing Bi-CMOS semiconductor devices in which further comprises the steps of; depositing a polysilicon layer, an oxide film and a nitride film one and another in order to form the emitter and collector of a bipolar transistor, and the gates of a CMOS; forming an oxide film and a nitride film at the side wall of the polysilicon layer one and another; etching the exposed portions of an epitaxial layer and depositing other nitride film on the nitride film at the side wall; growing an oxide film on the etched portions of the epitaxial layer and removing all the nitride films; and implanting impurities on portions of the epitaxial layer exposed by the etched nitride films in order to make the inactive base region of the bipolar transistor and the source/drain regions of a PMOS transistor P+ type, and to make the source/drain regions of a NMOS transistor n+ type. Accordingly, the widths of the regions can be decreased and thus junction capacitance can be reduced in accordance with the magnitude of the decreased width.
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申请公布号 |
US5149663(A) |
申请公布日期 |
1992.09.22 |
申请号 |
US19910780253 |
申请日期 |
1991.10.21 |
申请人 |
KOREA ELECTRONICS & TELECOMMUNICATIONS |
发明人 |
CHAI, SANG H.;KOO, YONG S.;KIM, KWANG S.;NAM, KEE S. |
分类号 |
H01L21/8249;H01L27/06 |
主分类号 |
H01L21/8249 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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