| 摘要 |
A plurality of field effect transistors (FETS) (Q0A to Qn-1A, and Q0B to Qn-1B) are arranged in a structure (10) to normally perform a first logic function such as NAND. Selectively implanting the channel region (38) of at least one of the FETs (30) with sufficient ions of a predetermined ion species such that the respective FET (30) maintains a constant logic state (constantly turned ON or OFF) for all logical values of applied gate voltage converts the structure (10) to perform a second logic function such as NOR. Alternatively, one of the logic states may be "stuck high" (constant logical high output) or "stuck low" (constant logical low output). The channel implants are substantially undetectable, rendering the structure (10) highly resistant to reverse engineering.
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