发明名称 METHOD AND DEVICE FOR DUPLEXED BUS CONTROL
摘要 PURPOSE:To speed up the control by supplying a bus use permission signal to one selected electric circuit when bus acquisition signals selected by the buses of duplexed bus constitution are sent from the same electronic circuit, and considering that the transfer on the buses ends on the whole when data transfer ends on both the duplexed buses. CONSTITUTION:A BPU and an IOU input and inspect bus requests outputted to the buses by themselves and the output is performed through both the buses in case of the BPU, so retrial is done as it is. In case of the IOU, the request is not outputted to the bus B, so retrial is done after a fault signal on the bus B is outputted. Respective equipments connected to the duplexed buses once receiving the fault signal interrupts data transfer from the bus B and performs data transfer through the bus A. At this time, a comparator 540 in an arbiter stops comparing the contents of the select buses of the buses A and B and stops matching the end wait states of BIUs, thereby operating through only the bus A.
申请公布号 JPH04241035(A) 申请公布日期 1992.08.28
申请号 JP19910007522 申请日期 1991.01.25
申请人 HITACHI LTD 发明人 TANJI MASAYUKI;MIYAZAKI YOSHIHIRO;FUKUMARU HIROAKI;YAMAGUCHI SHOJI;MASUI KOJI;OGAWA HISAO
分类号 G06F11/14;G06F11/18;G06F11/20;G06F13/00;G06F13/364;G06F13/40;G06F13/42 主分类号 G06F11/14
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