LOOP-BACK TESTING CIRCUIT

摘要

The loop back testing circuit executes loop back test, not stopping the operation of data link interfacing unit, by receiving loop back instruction and time slot designating data transmitted from a microprocessor when data link is operated abnormally. The circuit comprises a signal terminal master interfacing unit (20) for interfacing the loopback control data of a CPU, a delay unit (10) for delaying frame synchronous signal transmitted from a time switch, a counter (30) for counting time slot designating data, a time slot switch unit (40) for opening time slot to which a loop back test is applied, a LED driving unit (50) for displaying that the loopback test is on and a data path switch unit (60) for controlling data path.