发明名称 FAULT DETECTING/INHIBITING CIRCUIT
摘要 PURPOSE:To enable continuation of execution without stopping an operation even when a fault occurs in hardware not operating in an operation mode in execution, by inhibiting detection of the fault of the hardware not operating in the mode. CONSTITUTION:Masking circuits 10 to 12 for inhibiting outputs of fault detecting circuits 4 to 6 according to a mode signal 301 are provided between the fault detecting circuits 4 to 6 checking outputs of logic circuits 1 to 3 operating in a plurality of operation modes and fault storage circuits 7 to 9. The fault storage circuits 7 to 9 store outputs of the masking circuits 10 to 12 when the outputs of the fault detecting circuits 4 to 6 are masked by the masking circuits 10 to 12, while they store the outputs of the fault detecting circuits 4 to 6 as they are, when these outputs are not masked by the masking circuits 10 to 12. Even when a fault occurs in hardware not operating, according to this constitution, an operation of an information processing device can be continued without stopping it.
申请公布号 JPH04235368(A) 申请公布日期 1992.08.24
申请号 JP19910012713 申请日期 1991.01.09
申请人 KOUFU NIHON DENKI KK 发明人 WATANABE FUYUKI
分类号 G01R31/317;G06F11/00 主分类号 G01R31/317
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