| 摘要 |
PURPOSE: To provide a limiter circuit using a field effect transistor in which inserted phase change resulting from the field effect transistor operating in a saturated state can be minimized. CONSTITUTION: This is a limiter circuit having a field effect transistor constituted of two constant voltage supply sources, that is, a bias circuit 11 for a gate and a bias circuit 12 for a drain. A resistant load Rg is serially connected with the supply source for the gate of the transistor. This circuit can be applied especially to space communication. |
