| 摘要 |
PURPOSE:To prevent the performance decline of transistors by suppressing the fluctuation of the gate width of the transistors in such a way that a dummy area having a similar shape is provided between the two transistors and making the intervals between active areas and the dummy area equal to the interval between other transistors. CONSTITUTION:An earthing power supply line GND is laid between memory cells S11 and S12. In this area, the interval between transistors M3 in the memory cells are made longer than the interval GAP2 between active areas 2a and 3a in which other transistors M3 and M4 are formed. Accordingly, a dummy area 17 which is formed in the same process as the active area 3a where the transistor M3 is formed and has a similar shape as that of the active area 3a is provided between the two active areas 3a. Therefore, the intervals between the active areas 3a and dummy area 17 become the same as that GAP2 between the active areas 2a and 3a. |
