SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE:To allow writing of a large quantity of data with one time of access by connecting one of data lines upon receipt of one selection signal from a 1st column decoder at the time of an ordinary mode and all the data line regardless of a 2nd column selection signal at the time of a block write mode to registers. CONSTITUTION:The latch data in the registers CR1,..., CRn are written into the one memory cell MC connected to one word line WLs selected by the row decoder RD in the one column selected by the 1st column decoder CD1 among the column blocks selected by the 2nd column decoder CD2 at the time of the ordinary mode. The latch data in the registers are simultaneously written into j pieces of the memory cell MC connected to the one word line WLs selected by the row decoder RD among the column blocks selected by the 2nd column decoder CD2 at the time of the block write mode. The data quantity which can be written with one time of access is increased in this way and the writing of the data at a high speed is executed.