发明名称 Method and apparatus for designing integrated circuits for testability
摘要 The invention is a method for designing testability into an integrated circuit. This method is termed register transfer scan (RTS). The RTS method comprises two primary rules. The first rule is that every global feedback path in the functional circuit must contain at least one scannable storage element, i.e. it must be accessible such that data can be placed into it or read from it without passing the data through the functional circuitry of the chip. The second rule of the RTS method is that the controls for those storage elements that are not scannable are held inactive when data is being scanned into or out of the scannable storage elements.
申请公布号 US5132974(A) 申请公布日期 1992.07.21
申请号 US19890426565 申请日期 1989.10.24
申请人 SILC TECHNOLOGIES, INC. 发明人 ROSALES, BARRY C.
分类号 G01R31/3185 主分类号 G01R31/3185
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