| 摘要 |
PURPOSE:To immediately output the video element information of the corresponding row (column) and to remarkably reduce the processing time, by inputting the video element information of the corresponding row (column) of the reference pattern and the scanning mask from the address line of memory. CONSTITUTION:The video element information of the corresponding row of the scanning mask 4 and the reference pattern 5 is input to address lines 9-16 of the memory 8 via exclusive logical sum gates G1-G8. All the combinations of ''0'' and ''1'' signals delivered from the address lines 9-16 is assumed, and the number of ''0'' signals in each combination is calculated in advance and stored in the memory 8. Thus, when a signal is fed to address lines 9-16, the number of ''0'' signals is led out as output immediately from the corresponding address. That is, when address receives input in one clock pulse, since the count is finished once, the processing time can remarkably be reduced. |
