发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To make it possible to identify easily the histories of the manufacturing conditions of individual products by a method wherein a semiconductor integrated circuit is provided with an identification bonding pad, whose one part and other part are bonded with a bonding wire and which is isolated and divided into two at a distance smaller than the width of a bonding region, and a test mode terminal. CONSTITUTION:Comb-type patterns are alternately intruded into an input terminal T1 and an identification bonding pad 2, which is insulation-isolated into two, is provided. Half of the pad 2 is connected to an input wiring L and the other side is connected to a drain of an identification transistor 3 with its earthed source. In the case one end of a bonding wire BWb from the terminal T1 is bonded to the pad 2, the two comb-type patterns are short-circuited, which are isolated by the bonding region B at a distance (d), and as the transistor 3 and the pad 2 are connected to each other, an input current of the terminal T1 becomes a constant current which is determined by the transistor 3. Thereby, the identification of a chip becomes possible by a simple procedure of measuring a high-level input current.
申请公布号 JPH04188643(A) 申请公布日期 1992.07.07
申请号 JP19900313730 申请日期 1990.11.19
申请人 NEC CORP 发明人 KATO NORIAKI
分类号 H01L21/66 主分类号 H01L21/66
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