| 摘要 |
PURPOSE:To form a memory cell array region having a large capacity without increasing its surface area by composing bit lines of first and third semiconductor thin films, forming switching transistors for the first and third films to form word lines, and forming a laminated structure of bit line pair. CONSTITUTION:Stored information is read by selecting one word line 27 composed of a first layer polysilicon thin film in a memory cell array region to conduct switching transistors. Charged stored in a charge storage capacity element formed of a polysilicon thin film 23, a capacity insulating film 24 and a capacity electrode 26 formed of a second layer polysilicon thin film through the switching transistor at the first layer polysilicon thin film 23 and the third layer polysilicon thin film 32 precharged to a predetermined potential, and a charge storage capacity element formed of the film 32, a capacity insulating film 30 and the electrode 26 formed of a second layer polysilicon thin film, are transferred to redistribute the charge. The potential of the bit line formed of the films 23, 32 is varied from its precharged level, amplified by a bit line amplifier, and then output as a signal. |
