SYSTEM FOR REDUCING DELAY IN INSTRUCTION EXECUTION BY EXECUTING BRANCH INSTRUCTIONS IN SEPARATE PROCESSOR WHILE DISPATCHING SUBSEQUENT INSTRUCTIONS TO PRIMARY PROCESSOR
摘要
申请公布号
US5127091(A)
申请公布日期
1992.06.30
申请号
US19890297784
申请日期
1989.01.13
申请人
INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人
BOUFARAH, EDMOND J.;GROHOSKI, GREGORY F.;LEE, CHIEN-CHYUN;MOORE, CHARLES R.
