| 摘要 |
The protecting circuit against over-current protects the static data register (SDR) from peak current generated when data opposite to data stored in a memory is input. The protecting circuit includes control N-MOS transistor (Na,Nb) for transmitting input data to a data register (1), a latch unit (L1) comprising P-MOS transistors (P1,P2) and N-MOS transistors (N1,N2) for storing input data, and a power controller (10) for blocking powers (Vcc,Vss) flowing into a register (1) during switching time of the N- MOS and P-MOS transistors. The power controller (10) includes a P-MOS transistor (P10) for blocking the Vcc of the data register (1) by control signal (S2), an inverter (110) for inverting the control signal (S2) synchronized to system clock signal and a N- MOS transistor (N10) for blocking the Vss by the inverted control signal.
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