| 摘要 |
<p>PURPOSE:To utilize a chip terminal effectively by providing a means which selects an operation clock for display and a means which uses an unused terminal for an oscillator as a general port for inputting and outputting a signal other than clock pulses. CONSTITUTION:When the display clock 3 is used, one FET connected to a clock pulse selecting circuit 16 turns on by being applied at its gate with a high-level voltage, but the other FET is applied at its gate with a low-level voltage and does not turn on. Consequently, the clock pulse selecting circuit 16 can select the display clock 3 as the operation clock of a display part 12. When the display clock 3 is not used, on the other hand, one FET connected to the clock pulse selecting circuit 16 is applied at its gate with a low-level voltage and does not turn on and the other FET connected to a port input/ output control circuit 18 is applied at its gate with a high-level voltage and turns on, so the terminal 1b can be used as the general port. Consequently, the chip terminal can be utilized effectively.</p> |
