| 摘要 |
<p>PURPOSE:To execute the high speed transmission of a signal and to prevent the transmission error of the signal by equalizing the length of respective transmission lines and respectively connecting matching circuits to respective terminals of respective transmission lines. CONSTITUTION:The respective one ends of the respective signal lines 6 at the surface side of a bus wiring board 5 are connected to terminals 8 provided at same intervals on an outer peripheral part through resistances R1 and the respective one ends of the respective signal lines 7 at the back side are connected to ground patterns 9 on the outer peripheral part through R1. Specified number of the boards 5 are arranged at the same intervals on the same shaft line of a vertical direction in order to make lines 6 and 7 in a same phase. Thus, the set units of the lines 6 and 7 respectively generate parallel buses. Printed wiring board 13 mounting processing elements 12 are arranged vertically and radiatedly along the peripheral edge of the board 5. Data can be transmitted at without erroneous transmission among the respective processing elements 12 when the respective matching circuits 16 of the respective transmission lines are formed by the respective values of R1 and R2.</p> |
