发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To obtain an appropriate value of resistance and to make a high speed operation possible by connecting the sources of first and second transistors respectively with one and the other of a pair of bit lines, by connecting the drains of those transistors with each other and by connecting their connection with the source of a third transistor. CONSTITUTION:The source of a first MOS transistor 1 is connected with one bit line 5, the source of a second MOS transistor 2 is connected with the other bit line 6, the drains of the first and second transistors 1 and 2 are connected with each other and the connection of these drains is connected with the source of a third MOS transistor 3. Pull-up operations are respectively conducted via the first and third transistors 1 and 3 and via the second and third transistors 2 and 3. Then, when the first and second transistors 1 and 2 are inserted between the pair of bit lines 5, 6 to conduct resistance operations, the voltage amplitude of the bit lines 5, 6 is made small.
申请公布号 JPH04147670(A) 申请公布日期 1992.05.21
申请号 JP19900271732 申请日期 1990.10.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KAGAWA MINORU;OTANI AKIHIKO
分类号 G11C11/41;H01L21/8244;H01L27/11 主分类号 G11C11/41
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